1. Field of the Invention
The present invention relates to a wafer level packaging method, more particularly to a wafer level packaging method and a packaging structure by using the resistance welding principle to partially heat the contact surface between two wafers.
2. Description of the Prior Art
Under the prerequisite for the circumstances of light, thin, short, small consuming electronic product right now, the microelectromechanical systems (MEMS) product has become one of the main products. The MEMS combines many research technologies, such as the electrical engineering, electronic engineering, information, mechanical engineering, photoelectric engineering, material, biochemistry and control etc., namely the MEMS gather the microelectronic and micro-processing technology based on silicon, which nearly change every product category thoroughly, and make people realize the intact single chip system. They have development potentiality and perspective research and development field in the future, it is expected to bring great influence to the industry in the 21st century.
The MEMS packaging is mainly used in the environmental protection, electronic signal transmission, machinery support and heat treatment path etc. There are many packaging technologies, wherein, the wafer level packaging technology is one of the main developing directions in the MEMS packaging. However, due to the diversification, of the MEMS packaging and the requirement of environment, thus the challenge of the MEMS packaging is greater than the microelectronic systems packaging.
The so-called wafer level packaging is to cut for manufacturing the single element after all or most packaging test procedures are finished on the wafer directly, which can reduce the packaging and testing cost tremendously. In addition, another advantage of wafer level packaging technology is to adopt the whole batch operation. Thus, when the wafer size is larger, more packaging number per batch will be obtained. The cost will be further reduced, which meets the trend from 8″ to 12″ wafer factory. Generally speaking, the wafer level packaging can meet the requirements of power consumption, cost, as well as light, thin, short and small for the electronic products. Especially, under more popularizing application of MEMS element, it will become main marketer for the growth of wafer level packaging industry, therefore attract the great input of professional wafer manufacturing and packaging industry.
However, the direct bonding is adopted in the conventional wafer level packaging technology. The bonding temperature is about 1000° C., and the working temperature of bonding is achieved by the whole heating way. The shortcoming of this way is that the high temperature may cause the abnormal function of other elements on the wafer. Even if some improvement technologies have been developed, such as the frit bonding or anodic bonding, the contact surface has to be treated specially before bonding to make the bonding surface flat and free of metal oxide layer. Some packaging technologies even need extra micro-heater to prevent damaging other elements, which not only will increase the manufacturing cost but also will waste much wafer area.